Understanding the DC characteristics of the Z80 CPU

When checking the compatibility of digital chips it's important to understand the electrical DC characteristics found in the datasheet. In this example we'll see how those have to be interpreted for the connection between the Z80 and Intel's 2114 RAM chips.

IMO eight parameters in the datasheet of the Z80 CPU are of interest:
- VIL (input low voltage)
- IIL (input low current)
- VIH (input high voltage)
- IIH (input high current)
- VOL (output low voltage)
- IOL (output low current)
- VOH (output high voltage)
- IOH (output high current)

Maximal and minimal values for the NMOS Z80 CPU (a few values differ slightly for CMOS CPUs):
- VIL = 0.8 V (max), IIL = 0.01 mA
- VIH = 2.0 V (min), IIH = 0.01 mA
- VOL = 0.4 V (max), IOL = 2.0 mA
- VOH = 2.4 V (min), IOH = 0.25 mA
An NMOS Z80 is able to sink 2.0 mA and source 0.25 mA in NMOS/TTL circuits.
So when the Z80 outputs a logic low ("0") it sinks current from the external source.
And when the Z80 outputs a logic high ("1") it sources current to the external load.

The characteristic values for a 2114 RAM chips (HMOS, fully TTL compatible):
- VIL = 0.8 V (max), IIL = 0.01 mA
- VIH = 2.0 V (min), IIH = 0.01 mA
- VOL = 0.4 V (max), IOL = 2.1 mA (min)
- VOH = 2.4 V (min), IOH = 1.0 mA (min)
It's not surprising that the values are similar as both CPU and SRAM are built in NMOS technology.

In the reZet80 SCOUT and reZet80 PIONEER systems each of the CPU data lines D0-D7 is connected to one SRAM chip. The CPU address lines A0-A9 and the /WR pin are connected to both RAM chips (the 2114 is a 4-bit chip). A 74LS139 demultiplexer drives the /CE pins of the SRAM chips but let's ignore it for now to keep things simpler.

When the CPU reads data from memory the values that apply are:
- for a logic "0":
  RAM: VOL = 0.4 V (max), IOL = 2.1 mA (min)
  CPU: VIL = 0.8 V (max), IIL = 0.01 mA
The maximal output voltage of the memory chip is lower than the maximal accepted input voltage of the CPU. And the RAM chip could drive low a minimum of 210 (2.1 / 0.01) Z80s.
- for a logic "1":
  RAM: VOH = 2.4 V (min), IOH = 1.0 mA (min)
  CPU: VIH = 2.0 V (min), IIH = 0.01 mA
The minimal output voltage of the memory chip is higher than the minimal accepted input voltage of the CPU. And the RAM chip could drive high a minimum of 100 (1.0 / 0.01) Z80s.

When the CPU writes data to memory the values that apply are:
- for a logic "0":
  CPU: VOL = 0.4 V (max), IOL = 2.0 mA
  RAM: VIL = 0.8 V (max), IIL = 0.01 mA
The maximal output voltage of the CPU is lower than the maximal accepted input voltage of the memory chip. And the CPU could drive low a maximum of 200 (2.0 / 0.01) memory chips on every data, address and control line.
- for a logic "1":
  CPU: VOH = 2.4 V (min), IOH = 0.25 mA
  RAM: VIH = 2.0 V (min), IIH = 0.01 mA
The minimal output voltage of the CPU is higher than the minimal accepted input voltage of the memory chip. The CPU could drive high a maximum of 25 (0.25 / 0.01) memory chips on every data, address and control line.

That seems to be enough driving power for two memory chips (1 KiB).