64 KiB ROM / RAM board UPDATE

I did some modifications to the board that restrict the activity of the memory chips, yet the functionality remains unchanged.

The /CE pin of the ROM and the /CE1 pin of the RAM were active even on I/O instructions although no harm was caused to the overall functionality of the system as the /MEMRD and /MEMWR signals were only active on memory accesses.

Now all three pins /CE, /CE1 and /CE2 become active only on memory accesses and I got rid of the 74x04 inverter.

Another small modification: I connected both A15 and A16 of the SRAM chip to GND, so now the lower 32 KiB get accessed.