Reset board UPDATE

The TL7705 supervisor and 2 accompanying capacitors are now optional.

If you omit the TL7705 you have to manually press the reset button every time you power up the system (more work, less hardware).

CPU board and CPUBUS specs UPDATE

The signals BUSACK, BUSREQ, HALT, NMI, RFSH and WAIT are optional on the CPUBUS, so these pins can be used as user-defined.

The CLK signal is pulled high to ensure the right voltage for the CPU in NMOS/TTL and mixed systems (CMOS CPU and NMOS CRTC for example).

reZet80 CPU bus:
CPUB01: D7
CPUB02: D6
CPUB03: D5
CPUB04: D4
CPUB05: D3
CPUB06: D2
CPUB07: D1
CPUB08: D0
CPUB09: IOREQ
CPUB10: MREQ
CPUB11: NMI | user-defined
CPUB12: INT
CPUB13: RD
CPUB14: WR
CPUB15: BUSACK | user-defined
CPUB16: WAIT | user-defined
CPUB17: BUSREQ | user-defined
CPUB18: RESET
CPUB19: M1
CPUB20: RFSH | user-defined
CPUB21: GND
CPUB22: +5V
CPUB23: A0
CPUB24: A1
CPUB25: A2
CPUB26: A3
CPUB27: A4
CPUB28: A5
CPUB29: A6
CPUB30: A7
CPUB31: A8
CPUB32: A9
CPUB33: A10
CPUB34: A11
CPUB35: A12
CPUB36: A13
CPUB37: A14
CPUB38: A15
CPUB39: CLK
CPUB40: HALT | user-defined