For simplicity the address space is divided into 2 parts having 32 KiB ROM in the lower half (0000h-7fffh) and 32 KiB RAM in the upper half (8000h-ffffh).
The address line A15 serves as ROM selector (/ROMSEL) and the inverted signal as RAM selector (/RAMSEL).
The memory read (/MEMRD) and memory write (/MEMWR) signals are also generated on the board.
A 128 KiB SRAM chip is used instead of a 32 KiB chip.
Bill of materials:
- PCB 12x8 cm (at least 40 rows)
- 40-pin right-angled male connector
- wide DIP-32 socket
- wide DIP-28 socket (or ZIF-40 socket in order to easily exchange ROM chips)
- 2x DIP-14 socket
- 128 KiB SRAM (LP621024D, KM681000B, DS1245Y, ...)
- 32 KiB ROM (AT28C256, ..., can be PROM, EPROM, EEPROM or FLASH)
- 74x04 hex inverter
- 74x32 quad 2-input OR gate
- capacitor 100 nF
